The present invention relates to a device to protect a semiconductor device from electrostatic discharge (ESD), and more particularly, to a device that protects the semiconductor device from ESD and resulting damage from the ESD.
Generally, electrostatic discharge (ESD) is one of the important factors that can adversely influence the reliability of a semiconductor device. Such electrostatic phenomenon can be classified into a human body model (HBM), a machine model (MM) and a charge device model (CDM) according to causes of the occurrence of the static electricity. The HBM is an electrostatic phenomenon resulting from a human body, the MM is an electrostatic phenomenon resulting from contact with a measuring machine and the CDM is a phenomenon in which static electricity accumulated in a device is instantly discharged by grounding with the outside.
If the static electricity is inputted to a semiconductor device, it flows intensively to the weakest portion of the semiconductor device. Because of this, a junction, a contact, a gate oxide film or other components located inside of the semiconductor device are melted, thereby resulting in failure. Therefore, the semiconductor device is necessarily provided with an ESD protection device in every input/output area in order to protect an internal circuit from electrostatic current.
Particularly, the thickness of the gate insulation film of a transistor consisting of an input/output buffer is more reduced with the development of manufacturing technology of semiconductor devices and thus an internal circuit can be more easily damaged. In other words, if the thickness of the gate insulation film of a transistor is reduced, the voltage breaking the gate insulation film is lowered, and thus the gate insulation film of the transistor may be broken by static electricity with the lower voltage in the case of using a conventional ESD protection device. To solve this problem, it is suggested to use a method in which a transistor is used in an ESD protection device.
A conventional device to protect a semiconductor from an ESD, as shown in FIG. 1, includes a transferring unit 11, a detecting unit 12, a driver 13 and a discharging unit 14.
The transferring unit 11 transfers static electricity inputted to the semiconductor device through an input/output terminal 15 to an external voltage (VCC) line 17.
The detecting unit 12 includes a resistance element R1 and a capacitor C1 serially connected between the external voltage line 17 and a grounding voltage (VSS) line 18, and detects the static electricity inputted to the external voltage line 17.
The driver 13 includes a CMOS type buffer formed by a PMOS transistor P1 and a NMOS transistor N1 serially connected between the external voltage line 17 and the grounding voltage line 18, and is enabled by the detecting unit 12 to drive the discharging unit 14.
The discharging unit 14 includes a NMOS transistor N2 connected between the external voltage line 17 and the grounding voltage line 18, and is driven by the driver 13 to interconnect the external voltage line 17 and the grounding voltage line 18.
Referring to operation of the conventional device that protects a semiconductor from an ESD, if static electricity is inputted from the input/output terminal 15, then static electricity is transferred to the external voltage line 17 by the transferring unit 11. The detecting unit 12 detects the voltage drop generated in the node located between the resister R1 and the capacitor C1 in response to the alternating current in a rising time at the initial stage of generation of the static electricity, and applies it to the driver 13. Then, since the PMOS transistor P1 of the driver 13 is turned on and the gate voltage of the NMOS transistor N2 of the discharging unit 14 is raised, thus turning on the NMOS transistor N2, the external voltage line 17 and the grounding voltage line 18 are interconnected and thus the static electricity transferred to the external voltage line 17 is discharged to the grounding voltage line 18. As a result, the device protecting the semiconductor device from ESD protects the internal circuit 16 of the semiconductor device from the static electricity inputted to the input/output terminal 15.
In conventional ESD protection devices voltage drop is rapidly generated during the alternating current brought about by the characteristics of the high rising time. In the initial stage of the static electricity, current flows to the capacitor C1 of the detecting unit 12 and passes through the resistance element R1, in which the device is operated prior to the junction breakdown time of the PMOS transistor P1 of the driver 13.
However, the voltage drop generated in the detecting unit 12 is limited to the alternating current in the rising section of the static electricity and therefore the time in which the detection voltage is detected is short. In other words, since the operational duration of the device is short, it is difficult to protect the internal circuit 16 from the static electricity. As a result, the internal circuit 16 may be damaged in sections due to the relatively rapid rise and fall of the static electricity.
To solve the above problem, the present applicant applied a circuit as shown in FIG. 2 as Korean Patent Application No. 2004-0114210, and the circuit shown in FIG. 2 includes a differently structured detecting unit 22 that detects electrostatic current transferred to the external voltage line 27 and drives a driver 23 by the detection voltage responding to the detected electrostatic current.
The device used to protect the semiconductor device from ESD as shown in FIG. 2 is provided with a transferring unit 21, the detecting unit 22, a driver 23 and a discharging unit 24.
The transferring unit 21 transfers static electricity inputted through an input/output terminal 25 to the external voltage line 27.
The detecting unit 22 includes a resistance element R2 and a diode D1 serially connected between the external voltage line 27 and the grounding voltage line 28, and responds to the electrostatic current flowing on the external voltage line 27.
The driver 23 includes a CMOS type buffer having a PMOS transistor P2 and a NMOS transistor N3 serially connected between the output terminal of the detecting unit 22 and the grounding voltage line 28, and is turned on by the detecting unit 22 to drive the discharging unit 24. Here, the gate of each of the transistors P2 and N3 is connected to the external voltage line 27 and the source of the PMOS transistor P2 is connected to the output terminal of the detecting unit 22.
The discharging unit 24 includes a NMOS transistor N4 connected between the external voltage line 27 and the grounding voltage line 28, and is driven by the driver 23 to interconnect the external voltage line 27 and the grounding voltage line 28.
Referring to operation of the further conventional device to protect a semiconductor from an ESD, static electricity inputted from the input/output terminal 25 is transferred to the external voltage line 27 by the transferring unit 21.
The detecting unit 22 transfers some of the static electricity inputted to the input/output terminal 25 through the diode D1 to the external voltage line 27 while sensing the electrostatic current inputted to the external voltage line 27, and detects the voltage dropped by the resistance element R2 in response to the electrostatic current to apply to the driver 23.
Then, since the PMOS transistor P2 of the driver 23 is turned on and the gate voltage of the NMOS transistor N4 of the discharging unit 24 is raised, then the NMOS transistor N4 is turned on. Also since the external voltage line 27 and the grounding voltage line 28 are interconnected then the static electricity transferred to the external voltage line 27 is discharged to the grounding voltage line 28.
As a result, the device protects the semiconductor device from ESD damage by protecting the internal circuit 26 of the semiconductor device from the static electricity inputted to the input/output terminal 25.
In such a conventional device to protect the semiconductor device from ESD as described above, the detecting unit 22 continuously detects the detection voltage in a section, when the electrostatic current flowing to the external voltage line 27 is larger than a predetermined value to drive the driver 23 so that the discharging time of the device can be extended.
However, as shown in FIG. 3, a voltage Vout, is applied to the gate of the discharging unit 24 of the conventional device to protect the semiconductor device from ESD damage. Shown in FIG. 2, is the detection voltage V1 which is detected in the detecting unit 22 which is then transferred through the driver 23 and depends on the detection voltage V1. A forward turn-on of the diode D1 must then occur in order to detect the detection voltage V1 in the detecting unit 22. In other words, the driving voltage of the diode D1 must be necessarily greater than the predetermined voltage (approximately 0.7V). In this case, the operation of the device is not sufficient and may damage the internal circuit 26 of the semiconductor device during a later part of the pulse in which the static electricity becomes small.